What's New

02/25/2019

Mentor delivers the most comprehensive Enterprise Verification Platform™

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Mentor delivers the most comprehensive Enterprise Verification Platform™ (EVP), delivering performance and productivity improvements ranging from 400X to 10,000X. Tightly integrated combining Questa® for high performance simulation, verification management and coverage closure, Portable Stimulus, Low-power, CDC & Formal Verification, Veloce® for hardware emulation and HW/SW system verification, Catapult® for High-Level Synthesis, PowerPro® for RTL Low-Power unified with the Visualizer™ debug environment.

12/18/2018

New Arm technology will strengthen driver trust on the road to safe mass autonomous deployment

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News highlights:

  • Arm introduces latest addition to the Arm Safety Ready program, a new “Automotive Enhanced” processor designed to help enable safe next generation driver experiences
  • Optimized for 7nm: Cortex-A65AE is Arm’s first multithreaded processor with integrated safety for handling sensor data in autonomous and high throughput needs in IVI/cockpit systems
  • Simultaneous multithreading optimized for high throughput workloads and offers best performance efficiency

According to recent data from AAA, 73% of American drivers are too afraid to ride in fully self-driving vehicles and 63% of US adults feel less safe sharing the road with self-driving vehicles while walking or cycling. Human acceptance of new advanced driver assistance systems (ADAS) and increasingly autonomous technologies will only happen if drivers and passengers feel safe relying on them.

Winning the trust of consumers is critical, and to deliver these trusted experiences carmakers need solutions that achieve the right balance of innovation and safety while being deployable, scalable and ready for mass production. In my regular conversations with leading OEMs and tier ones, it’s clear that a broad range of compute is required to meet the needs of tomorrow’s vehicles, and one size will not fit all when it comes to the compute powering these vehicles.

Earlier this year Arm demonstrated its commitment to accelerating the deployment of safe fully autonomous vehicles for OEMs and tier ones with the launch of our Safety Ready program and a dedicated range of Automotive Enhanced IP, including the Cortex-A76AE, which delivers the processing performance required for autonomous applications while changing the game with integrated safety. Today, to further expand our Automotive Enhanced IP portfolio, we are announcing the release of Arm Cortex-A65AE, formerly known as Helios-AE on our product roadmap.

Cortex-A65AE: First multithreaded processor with integrated safety

The Arm Cortex-A65AE (Automotive Enhanced) is the latest addition to Arm’s Automotive Enhanced portfolio of IP, designed for more efficient processing of the multiple streams of sensor data being generated in next generation vehicles, and to help enable innovative new driver experiences safely. It does this by delivering enhanced multithreading capability combined with integrated safety through our innovative Split-Lock technology.

In order to achieve higher levels of autonomy, there will be a large increase in the number of sensors monitoring the surroundings of the vehicle, including cameras, LiDAR and radar, resulting in a significant increase in throughput and compute requirements to safely process this data. Multiple sensor inputs allow cars to view their environment, perceive what is happening, plan possible paths ahead, and deliver commands to actuators on the determined path.

With so much data being collected at different points of the vehicle, high data throughput capability is a key part of the heterogeneous processing mix required to enable ADAS and autonomous applications. It’s also critical that safety is at the heart of these systems. The Cortex-A65AE is ideal for managing the high throughput requirement for gathering sensor data and can be used in lock-step mode connected to accelerators, such as ML or computer vision, to help process the data efficiently. But what’s most critical, is that it does this with a high level of safety capability.

Alongside the increase in sensor inputs, more autonomy and advancing driver aids will dramatically change the human automotive experience. As part of this transition, there will be many more screens in our cars delivering enhanced experiences. Drivers will be informed through augmented reality head-up-displays, alerts and improved maps. Passengers will be immersed by rich video entertainment delivered by many screens throughout the car, but trust, reliability and safety are all critical to the acceptance of these new cabin experiences. Sensors will not only be sensing out, but will be sensing in, monitoring drivers. They will be able to monitor eyelid movement to detect tiredness, body temperature, vital signs and behavioural patterns to personalise the in-car experience. These capabilities require high throughput, ML processing and a lot of heterogeneous compute.

To deliver rich, immersive in-vehicle experiences efficiently, a heterogeneous compute cluster is necessary. Cortex-A65AE is Arm’s first throughput focused application class core with Split-Lock. Together with Cortex-A76AE (also with Split-Lock), these cores enable the highest safety integrity level with leading performance and power efficiency.

The addition of the multithreaded Cortex-A65AE processor to the Arm automotive platform further cements Arm’s bumper-to-bumper automotive leadership, and the Arm software ecosystem is ready for Cortex-A65AE, with support from Arm Safety Ready developer tools and Linux patches already up-streamed.

Accelerating a safer path to fully-autonomous driving

Per year, 5.3 trillion miles are driven in cars and light vehicles depending on Arm processors. Looking ahead, the Arm automotive roadmap includes Hercules-AE optimized for 7nm in 2019 as well as future Cortex-R solutions. Arm is transforming what’s possible by extending our portfolio to deliver the broadest range of functional safety capable IP products in the industry. The entire platform is supported by the Arm Safety Ready program, drawing on our extensive experience in safety for the faster delivery of safer automotive solutions by OEMs, automotive tier ones and silicon partners.

For more information on our commitment to vehicle safety, please visit our Safety Ready page.

https://www.mentor.com/events/dvcon

11/27/2018

Arm and AWS: Working together to “Re:Invent” the cloud

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By: Drew Henry, senior vice president and general manager, Infrastructure Line of Business, Arm

Last night was a seminal moment for the entire Arm ecosystem, a moment that many people have worked tirelessly towards for a long time.  At their annual Re:Invent conference, and during Peter Desantis’ “Monday Night Live” keynote, AWS announced the immediate availability of Arm® Neoverse™-based application servers!

Before I go into more detail, let me recap the announcement we made last month at Arm Techcon.  Arm Neoverse is our new brand for the architectures, products, and solutions we specifically design for the rapidly transforming cloud to edge internet infrastructure needed to enable a world of a trillion intelligent devices. For years we have been developing technologies for the networking, storage, and compute platforms needed for the internet infrastructure and integrating those technologies into our existing Arm Cortex® products, but Cortex is best known as the leading processor architecture for smartphones and the emerging world of IoT devices, so we’ve segmented our product line and Neoverse is the result. During Techcon we shared our new Neoverse roadmap, building off our current “Cosmos” platform, followed annually by “Ares”, “Zeus”, and “Poseidon” platforms.

To date, Arm powered infrastructure solutions are doing very well. During Techcon we shared that Arm is now the leading processor architecture powering these solutions, and that Arm processors are being rapidly adopted into a new class of cloud servers that manage the networking, storage, and security workloads in modern cloud datacenters. What you may not realize is that these workloads, until recently, only ran on x86-based application servers. The Arm ecosystem will ship well over 1M of these servers this year!

Yet despite the success we are having, we are constantly asked when Arm-based application processors will be deployed in volume. Well, today is that day! AWS announced that they are running application workloads on Arm. These servers are powered by AWS Graviton, a world-class processor built by Annapurna Labs, a wholly owned AWS subsidiary, based on the Arm Neoverse “Cosmos” platform, and specifically built to run customer application workloads. The Arm-based Graviton processors are powering all new Amazon EC2 A1 instances.  The new instances will lower costs by up to 45%, and are being targeted for scale-out workloads, including containerized microservices, web servers, development environments, and caching fleets.

If you don’t know who Annapurna Labs is, then you need to know their story. Bilik “Billy” Hrvoye and Nafea Bshara co-founded the company in Israel with a vision to build great products for the cloud. They chose Arm as their base architecture and we were an early investor in their start up. Billy and Nafea put together a world-class team and started designing storage and networking processors. AWS was an early customer and in 2015 they acquired Annapurna Labs since they knew that building their own silicon would allow them the control and design flexibility needed to rapidly expand the AWS cloud. James Hamilton, an AWS fellow and vice president, teased this vision in his 2016 Re:Invent keynote and in each subsequent year more of this vision was unveiled as new Annapurna designed processors were powering more of the core infrastructure within AWS.

Last night the Annapurna team proved how talented they truly are with the announcement of Graviton.

I am incredibly excited about this announcement and very proud of all the work the Arm Neoverse ecosystem has put in to make this happen.  From close collaboration with the most cutting-edge foundries in the world, through to a robust set of software offerings, the Arm Neoverse ecosystem is transforming the infrastructure.  The deployment of Arm Neoverse application processors by a hyperscaler is validation of our architectural choices, software maturity, and investment decisions.   For the Arm Neoverse ecosystem, yesterday’s announcement is proof of the broad applicability of the Arm architecture.  It means growth in the market for products within the Arm Neoverse ecosystem is accelerating.

We are particularly excited for Billy and Nafea and the entire team at Annapurna and the rest of AWS who built an amazing Arm-based application processor powering some innovative AWS solutions. Congratulations!

11/20/2018

Siemens PLM Software drives Feihe Dairy in strategic business digitalization journey

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  • Feihe Dairy to digitalize their complete value chain with the Siemens PLM Software digital innovation platform
  • Digitalization can help Feihe Dairy achieve greater operational efficiency and transparency in the complete production line

Siemens PLM Software and Heilongjiang Feihe Dairy Co., Ltd. have signed a strategic agreement focusing on the digitalization of Feihe Dairy’s research and development, simulation and testing, as well as quality monitoring, supply chain management and production execution. With Siemens’ leading digital innovation platform and industry expertise, this cooperation can help Feihe Dairy to realize its digitalization strategy and set a benchmark for digital innovation in the Chinese dairy industry.

“Siemens PLM Software is a trusted leader in the field of digital manufacturing. In fact, our Kedong factory started cooperating with Siemens PLM Software last year in the deployment of a manufacturing execution system.” said Feng Hailong, CIO of Feihe Dairy Group. “Siemens PLM Software has a forward-looking strategy and global experience that best supports our goals and vision, as well as those of the entire Chinese dairy industry. We trust Siemens PLM Software to help us overcome the challenges in the journey to digital transformation.”

Founded in 1962 with its headquarters in Qiqihar, Heilongjiang Province, Feihe Dairy is one of the earliest milk powder producers in China. It created milk powder formula more suitable for Chinese consumers, especially for babies and infants. However, with the decades-long growth of the Chinese market and increased global competition in recent years, Feihe Dairy found itself in need of upgrading from a traditional dairy manufacturer to a modern digital enterprise; a consistent issue across the entire Chinese dairy industry.

Feihe Dairy faces many challenges in looking to transform their business model, including the areas of new product research and development, quality control, data transparency, production efficiency, and overseas acquisitions management. To address these, Feihe Dairy has achieved the whole process of control from pasture planting, large scale dairy farming, to production and processing, logistics and warehousing, channel management, and even after-sales service. It can further improve the ability of product research and development control, strengthening the construction of enterprise digital capability. After careful consideration, Feihe Dairy has selected Siemens PLM Software for its end-to-end digital innovation strategy, and its ability to integrate multiple aspects and systems to fully support the transformation to digitalization, including enterprise resource planning, product lifecycle management, manufacturing execution systems and automation. In addition, the embedded quality (LIMS) and advanced planning and scheduling (APS) functionality of Siemens’ offering were also seen as key differentiators.

Siemens’ digital innovation platform can create comprehensive and precise digital models of products and production operations as a means to manage the complexity and simulate the performance of smart products and smart production operations, helping manage data and processes within the value chain to maintain a high level of quality. It also helps to streamline and digitalize business processes within the group, which can improve efficiency in production chains. With this integrated solution, the manual process and paper files will be replaced by an automated process and digital files, which can enhance efficiency within Feihe Dairy. Meanwhile, customers can also access the information about products and orders in the process and system so that production information can be truly traceable, which can help drive Feihe Dairy’s business model toward make-to-order (MTO) and gain great competitive advantages on the market. Feihe Diary plans to first implement these solutions in its plant in Kedong.

“We are honored to be selected by and work with Feihe Dairy in their digital transformation,” said Leo Liang, senior vice president and managing director of Siemens PLM Software for Greater China. “Feihe Dairy is a leading brand in the industry and the nation, and the dairy industry is a key aspect of people’s wellness. Siemens PLM Software is committed to help not only Feihe Dairy but the whole Chinese dairy industry to upgrade and transform.”

Follow us on Twitter at: www.twitter.com/siemens_press

Siemens PLM Software, a business unit of the Siemens Digital Factory Division, is a leading global provider of software solutions to drive the digital transformation of industry, creating new opportunities for manufacturers to realize innovation. With headquarters in Plano, Texas, and over 140,000 customers worldwide, Siemens PLM Software works with companies of all sizes to transform the way ideas come to life, the way products are realized, and the way products and assets in operation are used and understood. For more information on Siemens PLM Software products and services, visit www.siemens.com/plm.

Siemens AG (Berlin and Munich) is a global technology powerhouse that has stood for engineering excellence, innovation, quality, reliability and internationality for more than 170 years. The company is active around the globe, focusing on the areas of electrification, automation and digitalization. One of the largest producers of energy-efficient, resource-saving technologies, Siemens is a leading supplier of efficient power generation and power transmission solutions and a pioneer in infrastructure solutions as well as automation, drive and software solutions for industry. With its publicly listed subsidiary Siemens Healthineers AG, the company is also a leading provider of medical imaging equipment – such as computed tomography and magnetic resonance imaging systems – and a leader in laboratory diagnostics as well as clinical IT. In fiscal 2018, which ended on September 30, 2018, Siemens generated revenue of €83.0 billion and net income of €6.1 billion. At the end of September 2018, the company had around 379,000 employees worldwide. Further information is available on the Internet at www.siemens.com.

Note: Siemens and the Siemens logo are trademarks or registered trademarks of Siemens AG. All other trademarks, registered trademarks or service marks belong to their respective holders.

11/20/2018

Dean on hybrid cloud bursting EDA flows with IC Manage PeerCache

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Cooley: Cloud is hot this year clearly.  Dean this seems to be your year.  
           Dean you just announced a tool that helps get EDA flows into the
           cloud.  (ESNUG 582 #8)  Does that put you in trouble?
           I mean with Cadence going full hog into the cloud, too?

     Dean: No.

   Cooley: Ok, thanks.  (laughter)

     Dean: What we announced was IC Manage PeerCache.  Which is a high 
           performance, scale-out I/O solution.  So that you can get the
           I/O that you need to run the compute jobs in the cloud.  

           What that gives you is the ability to run your existing 
           workflows, your existing tools, and your existing designs using a
           cloud burst -- so you can expand into the cloud and run without 
           having to change your stuff.

           When you look at what Cadence is focused on, they're working on 
           getting the licensing model sorted out so that you can get 
           licenses to the tools in the cloud and get them on-demand.  And 
           they're working on making the tools available in the cloud, okay,
           so that you can get them, and they're compatible with the various
           cloud providers.

 

 

           But they're not doing a system like PeerCache which dynamically 
           determines which files are needed for which job and then quickly
           transmits them up to the cloud -- and only use the ones that are 
           needed, providing a massive peer-to-peer I/O system so that you
           can run ten thousand jobs in the cloud.

           It's a very different focus, and in fact, totally complementary. 
           So, we're kind of cheering Cadence, on because we want more stuff
           available in the cloud, so that more people will want to use
           PeerCache to get their existing workflows into the cloud.

           The customers want to move into the cloud for the cost savings, 
           the benefits; if you look at the investment that the cloud 
           providers have done in data centers and the amount of technology
           they have developed, their cost advantages and their scale far 
           surpasses what any single semiconductor company could possibly 
           ever do, because the scale is so huge.  

           We have no choice.  You have no choice, you're going to have to 
           use cloud-based systems for design to be competitive in the long
           run.  And so, we've got to figure out how to get there.

 

 

           But there's such a huge investment that the design teams have 
           made in their workflows.  I mean the workflows are like the DNA
           of the organization.  You can't change them.  There's so much 
           history and you're using old designs, and you're re-porting 
           designs, and you're using old stuff and new stuff and merging it.  

           It's complicated, and to just say 'Oh I'm going to flip it into 
           the cloud' when the cloud has no real shared file system doesn't
           really work.  You need some kind of shared file system to make it
           work.

           And that's what PeerCache provides.  It's a cool product that 
           solves a key problem for our customers.

   Cooley: Okay.

11/14/2018

5G: The Future is Now, Murray Slovick is Editorial Director of Intelligent TechContent

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5G cellular telephony is rapidly approaching.  Industry watchers predict that mobile routers, home routers and other initial 5G products will be launched by the end of this year. It is expected that the first 5G-capable phones will start to appear early next year. AT&T has announced that it will launch 5G wireless service in 12 cities by the end of 2018, Verizon is bringing fixed 5G to homes in Sacramento, California, and four additional markets by year’s end and T-Mobile is aiming for a 2019 launch followed by nationwide 5G coverage in 2020.

5G infrastructure will address the speed, latency and bandwidth issues that restrain today’s 4G networks. The advantages of 5G are significant: it is intended to offer huge increases in data rates-in excess of 10GBps-extremely low latency, and uniform coverage over a wide area, as well as a thousand-fold increase in capacity.

5G will enable simultaneous ultra-high-speed wireless transmission (even in crowded environments) by opening new radio spectrum like millimeter wave (mmWave) bands over 20 GHz. The mmWave frequencies will first be utilized in Fixed Wireless Access (FWA) applications used by wireless carriers to provide Gbit FWA to residential customers. The next step will be using 5G mmWave to deliver Gbit mobile, such as live streaming of 4k video to smart devices and for the use of AR and VR applications.

In many respects, however, 5G will be a two-edged sword in that customer demand for new 5G mobile phones in 2019/20 is going to put additional strain on capacity within the electronic components supply network as components manufacturers and their distributors struggle to keep up with demand.

Here’s why: smartphones are the largest application market for multilayer ceramic chip capacitors (MLCCs) and at a time when major MLCC manufacturers are trying to increase production capacity to alleviating the current shortage, the dawning of the 5G era will rapidly increase the amount of MLCC s used. The average MLCC usage of 4G + (LTE-advanced) smartphones is estimated to be in the range of 550 to around 900, and it is predicted that each device in the 5G era will boost this number to more than 1,000.

To support the high data rates enabled by 5G systems will require mmW frequencies, namely, 24/26 GHz, 28 GHz/ and 37/39 GHz bands. In addition, active antenna ICs will be required to control gain, phase control and beam forming in the frequency bands.

Among the engineering challenges involved in using mmW frequencies are range limitations brought about by propagation losses; the higher the frequency the more the signal will degrade over distance. However recent advances in mmWave systems have turned some of the perceived disadvantages into system architecture enablers (think turning lemons into lemonade). For example, short transmission paths and increased propagation loss allow for spectrum re-use. And the established ability of mmWave in point to point communications to be tightly focused into beams allows signal strength to be directed exactly where it needs to go, reducing interference, and allowing multiple beams to be combined, resulting in increased range.

Deploying 5G on mmW frequencies presents great challenges to smartphone antenna and RF engineers. For example, to enable higher data rates 5G specifications mandate that handsets must support two uplink and four (4 x4 MIMO) downlink carriers in the bands above 1 GHz. This requires multiple antennas and independent RF pathways.

But as more antennas are packed into a smartphone, the average space that must be allotted to each antenna decreases. Making life even more difficult for the designer is the trend in smartphones to have a high screen to body ratio. Some of today’s 4G LTE phones achieve a 90% screen to body ratio. The gap in the bezel around the display is where the antennas reside. As the bezel shrinks, it squeezes antenna volume even further. As a result, a likely implementation is one where the antenna array is integrated into the same package containing the active transmitter and receiver circuits operating at the mmWave frequencies.

These compact electronically-steered antenna arrays will accommodate frequencies from hundreds of megahertz to tens of gigahertz and employ phased arrays, which have been used for many years in the aerospace and defense industries but are relatively new to the mass market world. New chips will support multiple radiating elements, and include gain and phase controls for analog RF beam steering.

Still another challenges that engineers now face is how to implement high-performance RF filtering in mmWave applications. There will be an increasing number of filters per device; the increase in RF paths within the device from multiple antennas and spectrum proliferation will require this larger number of filters. Unlike the power amplifier (PA), where a single device can be used for multiple frequency bands and technologies, a single filter will most likely be required for each individual frequency band.

RF filtering will be a vital technical point of a successful RF solution. One reason is that filters in the RF chain contribute to loss, which impacts Tx efficiency and will determine power-amplifier current draw as well as battery life. Maximizing PA efficiency on the uplink and receiver sensitivity on the downlink will require optimization of the entire RF chain.

Traditionally, passive RF/microwave components have been somewhat large, at least in package sizes to support the use of coaxial connectors. As the push toward 5G wireless networks requires the use of components in the mmWave frequency range, suppliers are preparing products that offer high performance and a high degree of flexibility, and perhaps even at lower cost.

Manufacturers of 5G-ready cables, connectors, filters and other components are now stepping up to the task ahead with some initial product scheduled to be revealed at Electronica in Munich, which opens as this is being written.

10/30/2018

Toshiba Releases Bluetooth® 5 IC for Automotive Applications.

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Highly expandable and integrated device will be fully AEC-Q100 qualified

TOKYO–(BUSINESS WIRE)–Toshiba Electronic Devices & Storage Corporation (“Toshiba”) has added “TC35681IFTG”, a new IC for automotive applications, to its line-up of ICs compliant with Bluetooth® low energy (LE)[1] core specification v5.0. The new device is suited to use in demanding automotive environments, as it delivers a wide operating temperature range, high RF transmission power and high RF reception sensitivity (a link budget of 113dB @125kbps at long range transmission). The mixed-signal TC35681IFTG contains both analog RF and baseband digital parts to provide a complete solution on a single chip.

In addition to the basic functions of Host Controller Interface (HCI) profile and GATT profile functions, TC35681IFTG adds the new functions defined by Bluetooth® core specification 5.0[2], including 2Mbps throughput, Long Range and Advertising Extension functions, stored in internal mask ROM. It also integrates a high gain power amplifier and realizes +8dBm for long distance communication.

When used in conjunction with an external non-volatile memory, the new IC becomes a fully-fledged application processor that temporarily loads applications and stores in internal RAM (76KB). It can also be combined with an external host processor.

The integration of 18 General Purpose IO (GPIO) lines and multiple communications options including SPI, I2C and a 921.6kbps, two-channel UART, gives TC35681IFTG the ability to form part of sophisticated systems. The GPIO lines offer access to a range of on-chip features including a wake-up interface, four-channel PWM interface and 5-channel AD converter. An on-chip DC-DC converter or LDO circuits adjust the external voltage supply to the required values on chip.

As it is designed to be compliant with AEC-Q100[3], the low energy IC is primarily intended to be used in automotive applications. The wettable flank package simplifies automatic visual inspection needed to deliver the high levels of soldering quality required to withstand the vibration experienced in automotive applications.

Current applications include Remote Keyless Entry, On-Board Diagnostics to collect sensor data, Tire Pressure Monitoring Systems, and other contributors to improved vehicle comfort and safety.

Key Features

– Low power consumption: 

– 6.0mA (transmitter operation @3.0V, output power: 0dBm, 1Mbps mode)

– 6.5mA (transmitter operation @3.0V, output power: 0dBm, 2Mbps mode)

– 11.0mA (transmitter operation @3.0V, output power: 8dbm, 1Mbps mode)

– 11.5mA (transmitter operation @3.0V, output power: 8dBm, 2Mbps mode)

– 5.1mA (receiver operation @3.0V, 1Mbps mode)

– 5.5mA (receiver operation @3.0V, 2Mbps mode)

– 50nA in deep sleep (@3.0V)

– High receiver sensitivity: 

– 95.6dBm (1Mbps mode)

– 93.2dBm (2Mbps mode)

– 101.2dBm (500kbps mode (S=2))

– 105.2dBm (125kbps mode (S=8))

– Supports Bluetooth® LE v5.0 central and peripheral devices

– Built-in GATT (Generic Attribute Profile)

– Supports servers and client functions defined by GATT

– Additional features as defined by Bluetooth® LE v5.0[2]

– 2Mbps

– Long Range (Coded PHY)

– Advertising Extension

– Supports automotive reliability

– Compliant with AEC-Q100[3]

– Operation in wide temperature range

– Wettable flank package

– Applications

– Bluetooth® low energy communication devices for automotive and industrial applications.

 

For more information about the new product, please visit:
https://toshiba.semicon-storage.com/info/lookup.jsp?pid=TC35681IFTG-002®ion=apc&lang=en

For more information about the line-up of Bluetooth® wireless communication ICs, please visit:
https://toshiba.semicon-storage.com/ap-en/product/wireless-communication/bluetooth.html

10/25/2018

Mentor CFD delivers fluid flow and heat transfer simulation solutions that are used to optimize a design created with CAD

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Mentor CFD

Mentor CFD delivers fluid flow and heat transfer simulation solutions that are used to optimize a design created with CAD.

CFD in FloEFD for Creo

Mentor CFD Solutions

Mentor’s extensive portfolio of CFD software delivers fast, accurate and design centric simulation to global players in many industries, including automotive, electronics, power, process and manufacturing.

Full-featured Frontloading CFD

FloEFD

By frontloading CFD simulation early in the design process, you can uncover problems faster, speed time-to-market and significantly reduce product development overhead. Easy to learn and use, FloEFD reduces overall simulation time by as much as 65-75 percent and can be used as a CFD plugin for Creo, CATIA V5, Siemens NX, Solid Edge, and SolidWorks or tightly integrated with systems such as Autodesk Inventor.

What is Frontloading CFD with FloEFD?

Video 7:16

The standard CFD for Electronics Cooling

FloTHERM

FloTHERM’s advanced CFD techniques helps engineers predict airflow, temperature, and heat transfer for components, boards, racks and data centers, and other electronic components. Optimize heatsinks, perform transient analysis, calibrate detailed thermal models, and more.

CAD-centric Thermal Analysis

FloTHERM XT

FloTHERM XT combines the electronics cooling DNA of FloTHERM with the CAD-centric design flow of FloEFD to enable thermal simulation at all stages of the electronics design process – from design to manufacturing.

Streamlined PCB Thermal Design

FloTHERM PCB

Reduce or eliminate PCB re-spins with FloTHERM PCB, a specialized tool for PCB designers that allows them to perform fast, reliable thermal verification in a third of the time needed by standard tools and processes.


Fast, Web-based IC Thermal Model Generation

FloTHERM PACK

Generate reliable, accurate thermal models of IC components, test boards, standard test harnesses and other associated parts 20 times faster on the cloud than conventional approaches.

Web-based Thermal Characterization Technology for Semiconductors

FloTHERM IC

Built around FloTHERM PACK SmartParts and FloTHERM CFD technology, FloTHERM IC offers engineers an intuitive web-based semiconductor package thermal characterization tool.

Flexible CFD Options

FloTHERM Flexx

FloTHERM Flexx gives engineering teams an easy way to have the best of both worlds: FloTHERM’s industry-leading thermal modeling and simulation tools as well as the CAD-centric FloTHERM XT.

10/17/2018

Arm goes higher up the stack for device-to-data IoT security

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Arm goes higher up the stack for device-to-data IoT security

October 17, 2018

By Paul Williamson, vice president and general manager, IoT device IP Line of Business, Arm

News highlights:

  • Arm is building the industry’s broadest IoT security offering with secure device IP and the Pelion IoT Platform guided by PSA design principles
  • Arm celebrates the first year of PSA with new APIs and API test kits to accelerate PSA development
  • Pelion IoT Platform to integrate Cybereason AI hunting engine for ongoing security of IoT devices

This week at Arm TechCon, Arm CEO Simon Segars shared details in his keynote address on version 2.0 of the Arm security manifesto. Within the manifesto, I look at the risks to IoT devices and how even a small-scale disruption of a company’s infrastructure will immediately compromise the integrity of the data, but also have a damaging long-term impact to the trust from businesses and consumers in data-driven insights.

Trust is ultimately the key to widespread adoption of any emerging technology. The same approach holds true for IoT silicon, systems and data. Security cannot be an afterthought in IoT devices because the confidence in any data-driven insight they provide is only as strong as the trust businesses and consumers can place in them.

One year later, PSA is an essential part of building trusted connected devices

As a starting point in building that trust, a year ago Arm introduced the Platform Security Architecture (PSA), a common framework for securing a trillion connected devices. Since that time, PSA has grown, gathering more industry support and offering deliverables on all areas of the three-stage pipeline; threat modeling documentation, specifications and reference software through the open source Trusted Firmware project (TF-M). Today, I’m announcing the latest PSA milestone – a series of APIs and accompanying test kits that will accelerate the development and delivery of robust PSA implementations.

PSA

We are releasing new PSA APIs and API compliance test kits to support three key areas of design, including:

  • PSA Developer APIs for RTOS vendors and software developers
  • PSA Firmware Framework APIs for security experts making custom secure functions
  • For chip vendors, the Trusted Base System Architecture (TBSA-M) Architecture Test Kit, checks for compliance of chip hardware to the PSA TBSA-M specification.

PSA is a reality today and already seen as essential for building trusted IoT devices. For example, In a research note earlier this year, leading industry analyst firm Gartner said “Technology product management leaders need to look into partnerships with security software companies, as well as prioritize semiconductor vendors that are planning to incorporate Arm’s PSA.”[i]

Building on our ongoing PSA investment, we recognize the need to equip our partners with full solutions and a system-wide approach for building secure SoCs faster. To address this, we’re also unveiling a new umbrella design solution at TechCon. The Arm secure foundation consists of Corstone foundation IP, pre-integrated with the processor and security IP; development tools (including FPGA/test chip boards) and open source Corstone ready software.

Of course, while PSA and secure IP such as Corstone, Arm TrustZone and Arm CryptoCell, are critical in designing secure IoT devices, Arm recognizes more needs to be done. We are committed to going higher up the solution stack to ensure IoT devices are secure as evidenced by the Arm Pelion IoT Platform. Pelion already integrates PSA principles and delivers unified device-to-data security across both IoT devices and data. The solution offers state-of-the-art PKI-based device security, trusted TLS security communication, data encryption, and other services such as secure firmware updates and in-field device access control.

Pelion gets a new hunting partner

However, the complexities associated with securing the vast attack surface of billions of connected devices requires industry collaboration to build an ecosystem dedicated to security from device-to-data. In the coming weeks, months and years you will see plenty of Arm partner collaborations focused on securing devices, but the one we’re announcing today with Cybereason brings an entirely new dimension for monitoring IoT device security to Pelion Device Management.

The Cybereason AI hunting engine is a shield for helping to safeguard all future Arm-based IoT devices tied into the Pelion IoT Platform. Cybereason’s technology can analyze 8 million events per second, and each one of events incidents could signal the start of an attack or that a device was failing. The joint solution will add visibility and attack response capabilities to the already strong protection offered by Pelion Device Management. The combined offering will include a comprehensive cybersecurity solution designed to operate at an IoT scale of billions of devices.

If you’re attending TechCon this week, stop by the Arm booth to see a joint demo with Cybereason that simulates an attack on a single smart meter and how it could compromise an entire utility provider’s data. If something like that were to happen, then it would ultimately create an immediate lack of consumer trust in those smart meters and the bills they are responsible for generating. This of course would have implications for an entire industry building connected devices.

Therefore, the industry must now think differently about how IoT systems are built and how they will be secured from device-to-data. Since our ecosystem has shipped more than 130 billion chips with your architecture, we are expected to think differently about how to get in front of future threats. It is why Arm is uniquely positioned to deliver the industry’s most scalable device-to-data security solution stack, starting with PSA as the common security framework for designing IoT devices, supporting those devices with a robust suite of security IP and ultimately securing and managing the devices and data generated with the Pelion IoT Platform.

08/04/2018

Confidence in the Use of Software Tools per ISO 26262

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Arm goes higher up the stack for device-to-data IoT security

October 17, 2018

By Paul Williamson, vice president and general manager, IoT device IP Line of Business, Arm

News highlights:

  • Arm is building the industry’s broadest IoT security offering with secure device IP and the Pelion IoT Platform guided by PSA design principles
  • Arm celebrates the first year of PSA with new APIs and API test kits to accelerate PSA development
  • Pelion IoT Platform to integrate Cybereason AI hunting engine for ongoing security of IoT devices

This week at Arm TechCon, Arm CEO Simon Segars shared details in his keynote address on version 2.0 of the Arm security manifesto. Within the manifesto, I look at the risks to IoT devices and how even a small-scale disruption of a company’s infrastructure will immediately compromise the integrity of the data, but also have a damaging long-term impact to the trust from businesses and consumers in data-driven insights.

Trust is ultimately the key to widespread adoption of any emerging technology. The same approach holds true for IoT silicon, systems and data. Security cannot be an afterthought in IoT devices because the confidence in any data-driven insight they provide is only as strong as the trust businesses and consumers can place in them.

One year later, PSA is an essential part of building trusted connected devices

As a starting point in building that trust, a year ago Arm introduced the Platform Security Architecture (PSA), a common framework for securing a trillion connected devices. Since that time, PSA has grown, gathering more industry support and offering deliverables on all areas of the three-stage pipeline; threat modeling documentation, specifications and reference software through the open source Trusted Firmware project (TF-M). Today, I’m announcing the latest PSA milestone – a series of APIs and accompanying test kits that will accelerate the development and delivery of robust PSA implementations.

PSA

We are releasing new PSA APIs and API compliance test kits to support three key areas of design, including:

  • PSA Developer APIs for RTOS vendors and software developers
  • PSA Firmware Framework APIs for security experts making custom secure functions
  • For chip vendors, the Trusted Base System Architecture (TBSA-M) Architecture Test Kit, checks for compliance of chip hardware to the PSA TBSA-M specification.

PSA is a reality today and already seen as essential for building trusted IoT devices. For example, In a research note earlier this year, leading industry analyst firm Gartner said “Technology product management leaders need to look into partnerships with security software companies, as well as prioritize semiconductor vendors that are planning to incorporate Arm’s PSA.”[i]

Building on our ongoing PSA investment, we recognize the need to equip our partners with full solutions and a system-wide approach for building secure SoCs faster. To address this, we’re also unveiling a new umbrella design solution at TechCon. The Arm secure foundation consists of Corstone foundation IP, pre-integrated with the processor and security IP; development tools (including FPGA/test chip boards) and open source Corstone ready software.

Of course, while PSA and secure IP such as Corstone, Arm TrustZone and Arm CryptoCell, are critical in designing secure IoT devices, Arm recognizes more needs to be done. We are committed to going higher up the solution stack to ensure IoT devices are secure as evidenced by the Arm Pelion IoT Platform. Pelion already integrates PSA principles and delivers unified device-to-data security across both IoT devices and data. The solution offers state-of-the-art PKI-based device security, trusted TLS security communication, data encryption, and other services such as secure firmware updates and in-field device access control.

Pelion gets a new hunting partner

However, the complexities associated with securing the vast attack surface of billions of connected devices requires industry collaboration to build an ecosystem dedicated to security from device-to-data. In the coming weeks, months and years you will see plenty of Arm partner collaborations focused on securing devices, but the one we’re announcing today with Cybereason brings an entirely new dimension for monitoring IoT device security to Pelion Device Management.

The Cybereason AI hunting engine is a shield for helping to safeguard all future Arm-based IoT devices tied into the Pelion IoT Platform. Cybereason’s technology can analyze 8 million events per second, and each one of events incidents could signal the start of an attack or that a device was failing. The joint solution will add visibility and attack response capabilities to the already strong protection offered by Pelion Device Management. The combined offering will include a comprehensive cybersecurity solution designed to operate at an IoT scale of billions of devices.

If you’re attending TechCon this week, stop by the Arm booth to see a joint demo with Cybereason that simulates an attack on a single smart meter and how it could compromise an entire utility provider’s data. If something like that were to happen, then it would ultimately create an immediate lack of consumer trust in those smart meters and the bills they are responsible for generating. This of course would have implications for an entire industry building connected devices.

Therefore, the industry must now think differently about how IoT systems are built and how they will be secured from device-to-data. Since our ecosystem has shipped more than 130 billion chips with your architecture, we are expected to think differently about how to get in front of future threats. It is why Arm is uniquely positioned to deliver the industry’s most scalable device-to-data security solution stack, starting with PSA as the common security framework for designing IoT devices, supporting those devices with a robust suite of security IP and ultimately securing and managing the devices and data generated with the Pelion IoT Platform.

07/24/2018

Polarion Synchronization Connector for DOORS

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Building on top of the Import Wizard for IBM DOORS released in Polarion 17.1 and to provide users with flexibility and choice, a brand new bi-directional synchronization connector is available to all DOORS 9.x users on Windows. Note, Polarion can be used on Linux, but must connect to an IBM DOORS client on Windows. The connector is part of core Polarion functionality. No additional software needs to be downloaded.

 

With this new connector, now IBM DOORS can easily co-exist with Polarion allowing IBM DOORS users to take advantage of all the great capabilities and features offered in a modern web ALM application. The new Polarion synchronization connector for DOORS supports many different use cases, workflows and supports a rich set of functionality. Perhaps you’re a DOORS user that wants to leverage ALM but still needs to maintain a legacy DOORS database for historical reasons. Perhaps you work with another team that still works in IBM DOORS, but you want to leverage the power of Polarion ALM? In either situation, the new Polarion synchronization connector for IBM DOORS can help you.

 

The new connector is designed for Polarion administrators to set up sync-pairs between DOORS modules and a Polarion live doc. The connector is highly customizable, so administrators simply decide what information should be synchronized between DOORS and Polarion (and vice-versa), how that information should be mapped, taking into consideration direction and priority. Once the sync-pair is set up, the administrator can decide to either run the sync manually or automate the process. This means, users can continue working in DOORS and Polarion as normal with no constraints, and in the background the connector keeps information synchronized. Administrators can set up as many sync pairs as they need for the DOORS modules they wish to synchronize with Polarion.

 

The connector is packed with capability supporting a wide range of different requirements definition styles in DOORS including custom attributes and enumerations.

The connector supports:

 

  • Connection to multiple DOORS installations
  • No limit on the number of DOORS modules you wish to synchronize.
  • Simple DOORS requirements definitions
  • Complex DOORS requirements definitions using custom attributes and enumerations allowing mapping to different work-item types.
  • All requirements in the module respecting the hierarchy.
  • All links between requirements in the same or different modules.
  • Rich text and attachments, including OLE objects. These can be images, for example.
  • Attributes and custom attributes.

Once a synchronization starts, administrators can view its progress and status in real time using the Polarion monitor. The connector provides detailed log files should administrators need to better understand the synchronization behavior.

 

Note: DOORS is a registered trademark of IBM.

03/27/2018

Labforge situational awareness platform will use AI to protect the Royal Canadian Air Force

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Intruders are at the fence, and before you can react, your security is compromised. That is a scenario that Velocity company, Labforge, wants to prevent using their artificial intelligence situational awareness platform. They have now announced a partnership with the Royal Canadian Air Force (RCAF) to protect the physical security of personnel and equipment on Canadian soil. This high tech network of sensors uses AI to understand the objects they see and visually display their movements on a map.

02/20/2018

PRO DESIGN Introduces Zynq™ UltraScale+™ Based FPGA SoC and IP Prototyping Platform

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PRO DESIGN, a leading supplier of FPGA-based Prototyping systems, today announced the launch of its three new proFPGA Zynq™ UltraScale+™ FPGA modules, which offer a complete embedded processing platform for the efficient development and verification of SoC and IP designs.

The proFPGA product family is a complete, scalable, and modular multi-FPGA Prototyping solution, which fulfills highest needs in the area of FPGA-based ASIC Prototyping. The new members of this flexible system concept are the proFPGA Zynq™ UltraScale+™ ZU11EG, ZU17EG and ZU19EG FPGA modules, which can easily be mounted on the proFPGA uno, duo or quad motherboards and mixed with other proFPGA FPGA modules like Virtex®-7, Virtex® UltraScale™, Virtex® UltraScale+™ or Kintex® UltraScale™ modules. The proFPGA Zynq™ UltraScale+™ FPGA modules address customers who require a complete embedded processing platform for high performance SoC Prototyping, IP verification and early software development. The innovative system concept and technologies offer highest flexi¬bility and reusability for several projects, which guarantees the best return on investment.

Equipped with the latest Xilinx Zynq™ UltraScale+™ ZU11EG, ZU17EG or ZU19EG FPGAs which combine FPGA logic with two ARM® Multi-Core Processors (Quad-core ARM® Cortex™-A53 and Dual-core ARM® Cortex™-R5) and several on-board interfaces like USB 3.0, Gigabit Ethernet, SATA, Display Port and debug interface, the new FPGA modules offer a complete embedded processing platform. Further, the boards already include an on-board DDR4 SODIMM module and a single quad SPI flash.

Nearly all SoC and ASIC designs contain some types of ARM® processors. Instead of implementing these ARM® cores into the FPGA and occupying important FPGA resources the user can take the proFPGA ZynqTM UltraScale+™ module which already has two embedded ARM® multi-core processors with verified interfaces and memory. In addition, the new FPGA module offers a direct ARM debug interface from which the user can benefit by using the proven ARM® debug environment in combination with the proFPGA prototyping system and by putting the focus on the actual verification of his design.

The new proFPGA ZynqTM UltraScale+™ modules offer a total of up to 5 extension sites with 531 standard I/Os and 16 multi-gigabit transceivers (MGTs) for extending the board with standard or user specific extension boards, or for easily connecting it to other proFPGA FPGA modules to expand the capacity. The well-designed board is optimized and trimmed to guarantee best signal integrity and highest performance. It allows a maximum point-to-point speed of up to 1.2 Gbps over the standard FPGA I/Os and up to 16.3 Gbps over the MGTs.

“In today’s ASIC and SoC designs you almost find always multi-core processors. The verification of these in combination with user designs and required firmware becomes essential and extremely complex. We are proud that with our new proFPGA Zynq™ UltraScale+™ FPGA modules we can provide a complete embedded processing platform at an early stage of the development process which helps our customers to master this challenging task”, said Gunnar Scholl, CEO of PRO DESIGN.

The proFPGA Zynq™ UltraScale+™ embedded processing platform comes with the proFPGA Builder software, which provides an extensive set of features, like advanced clock management, integrated self- and performance tests, automatic board detection, I/O voltage programming, system scan and safety mechanism and remote system configuration which only takes seconds, features which simplify the usage of the proFPGA system tremendously.

Availability

The proFPGA Zynq™ UltraScale+™ ZU11EG, ZU17EG and ZU19EG FPGA Modules are available since February 2018.

Demonstration
PRO DESIGN will demonstrate the proFPGA Zynq™ UltraScale+™ based FPGA Modules in San Jose, California at booth #1001 at the DVCon, from February 26 to 28, 2018.

About PRO DESIGN
The privately-held company was founded in 1982 and has about 100 employees, with various facilities in Germany, France and USA. PRO DESIGN has more than 35 years of experience in the EDA market, and as a provider in the E²MS market. PRO DESIGN has built-up extensive knowledge in the areas of electronic engineering, FPGA board development, FPGA design, high performance PCB design, production, assembly and testing.

About proFPGA
The proFPGA product family is a complete, scalable, and modular multi-FPGA prototyping solution, which fulfills the highest needs in the areas of ASIC and IP Prototyping and pre-silicon software development. The proFPGA product series consists of different types of motherboards, various Xilinx Virtex®-7, Virtex® UltraScale™, Virtex® UltraScale+™, Kintex® UltraScale™, Zynq™-7000 and UltraScale+™, and Intel® Stratix®-10 FPGA modules, a set of interconnection boards/cables and a large range of daughter boards like DDR3/4 memory boards or high-speed interface boards (PCIe Gen1/2/3/4, USB 3.0, Gigabit Ethernet, SATA, DVI, etc.). It addresses customers who need a scalable and flexible high-performance FPGA-based prototyping solution for early software development and IP/ASIC verification. The innovative system concept and technology offers best-in-class reusability across projects, guaranteeing the best return on investment.

Intel, the Intel logo, and Stratix® are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others.

02/13/2018

Arm’s Project Trillium Offers the Industry’s Most Scalable, Versatile ML Compute Platform

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News Highlights:

  • A new suite of Arm® IP brings machine learning (ML) to edge devices
  • With architectures built for high-performance and efficiency; Arm ML and Object Detection (OD) processors will deliver the best user experiences across the broadest range of applications
  • The new products will enable trillions of ML operations per second on mobile devices

Cambridge, UK – February 13, 2018 – Arm today announced Project Trillium, a suite of Arm IP including new highly scalable processors that will deliver enhanced machine learning (ML) and neural network (NN) functionality. The current technologies are focused on the mobile market and will enable a new class of ML-equipped devices with advanced compute capabilities, including state-of-the-art object detection.

Machine Learning

“The rapid acceleration of artificial intelligence into edge devices is placing increased requirements for innovation to address compute while maintaining a power efficient footprint. To meet this demand, Arm is announcing its new ML platform, Project Trillium,” said Rene Haas, president, IP Products Group, Arm. “New devices will require the high-performance ML and AI capabilities these new processors deliver. Combined with the high degree of flexibility and scalability that our platform provides, our partners can push the boundaries of what will be possible across a broad range of devices.”

ML technologies today tend to focus on specific device classes or the needs of individual sectors. Arm’s Project Trillium changes that by offering ultimate scalability. While the initial launch focuses on mobile processors, future Arm ML products will deliver the ability to move up or down the performance curve – from sensors and smart speakers, to mobile, home entertainment, and beyond.

Performance

Arm’s new ML and object detection processors not only provide a massive efficiency uplift from standalone CPUs, GPUs and accelerators, but they far exceed traditional programmable logic from DSPs.

The Arm ML processor is built from the ground-up, specifically for ML. It is based on the highly scalable Arm ML architecture and achieves the highest performance and efficiency for ML applications:

  • For mobile computing, the processor delivers more than 4.6 trillion operations per second (TOPs) with a further uplift of 2x-4x in effective throughput in real-world uses through intelligent data management.
  • Unmatched performance in thermal and cost-constrained environments with an efficiency of over three trillion operations per second per watt (TOPs/W). More details on the Arm ML processor are available on our website.

The Arm OD processor has been designed specifically to efficiently identify people and other objects with virtually unlimited objects per frame:

  • Real-time detection with Full HD processing at 60 frames per second
  • Up to 80x the performance of a traditional DSP, and a significant improvement in detection quality relative to previous Arm technologies. More details on the Arm OD processor are available on our website.

In combination, the Arm ML and OD processors perform even better, delivering a high-performance, power-efficient people detection and recognition solution. Users will enjoy high-resolution, real-time, detailed face recognition on their smart devices delivered in a battery-friendly way.

Arm NN software, when used alongside the Arm Compute Library and CMSIS-NN, is optimized for NNs and bridges the gap between NN frameworks such as TensorFlow, Caffe, and Android NN and the full range of Arm Cortex® CPUs, Arm Mali™ GPUs, and ML processors. Developers get the highest performance from ML applications by being able to fully-utilize underlying Arm hardware capabilities and performance. More details on Arm NN software are available on our website.

The new suite of Arm ML IP will be available for early preview in April of this year, with general availability in mid-2018.

Resources:

11/20/2017

Model Based Design (MBD) with Polarion ALM

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MBD or model based design is a popular approach in system engineering and software development circles. As engineers work with product requirements, they use model based design tools to better understand those requirements, often refining or even developing new requirements. In some cases, MBD is used for low level design, such as developing complex algorithms, understanding modal/ logical behaviors or designing the software architecture. As companies embark on a digital twin strategy, MBD plays an important role as often these models can be executed or simulated. Depending on the type of model, through simulation, engineers can validate early product requirements or even find potential pitfalls or bugs early on in the product development lifecycle when those issues costs less to resolve and fix. Even better, when products are actually connected to a network, through the use of the internet of things (IoT), engineers can use the products telematics and operational product data and feed this information back into engineering. Now these digital twin models can be used to either troubleshoot the product, drive improvements or provide the foundation to create new iterations of the product.

This all sounds very exciting, but what options are available to customers that are leveraging MBD and using Polarion? How does Polarion ALM work with MBD tools? Let’s explore the options in more detail.

Whether you using MBD for system engineering, software engineering or algorithm development, there are a wide range of Polarion integrations available to support MBD. Currently, Matlab Simulink, Sparx Enterprise Architect, IBM Rhapsody and Siemens own Teamcenter modeling are all available.

The integrations allow engineering teams working with models to ensure that their work is tightly coupled to the software engineering lifecycle being managed by Polarion. Modeler’s can create traceability links between the model artifacts and the product requirements, thus ensuring the requirements have appropriate coverage. Now when product requirements are either updated, deleted or changed inside of Polarion, engineers can quickly determine what impact this will have on the low level design – now represented by digital models. The opposite is also true, when the model might not be able to meet the design requirements, we can quickly determine what impact this will have on the total product requirements.

For some integrations, engineers can view the visual model representations inside of Polarion. In other cases, a hyperlink is provided allowing you to quickly navigate back to the modeling tool to view the model.

Modeling teams can also take advantage of Polarion ALMs comprehensive task and planning management ensuring that their modeling activities are kept to plan and within budget. Other Polarion features can also be leveraged by modeling teams such as Polarion extensive test management capabilities.

 

12EADiagramTraceInPolarion.png EA Artifacts viewed inside of Polarion ALM

Be sure to browse our Extensions Portal for yourself with hundreds of extensions for Polarion ALM that work with your existing toolchains. To learn more about Polarion ALM and how it can help to modernize your MBD toolchain through Collaboration, Traceability and Reuse contact your Polarion sales advisor or better yet Test Drive Polarion ALM Today!

Below are direct links to the MBD integrations currently available on the Polarion extension site:

  • Siemens Teamcenter link
  • Matlab Simulink link
  • Sparx Enterprise Architect link
  • IBM Rhapsody link
  • Sparx Enterprise Architect (Willert Connector) link
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